Dynamic random access memory ("DRAM") cells typically consist of one transistor and one capacitor. One of the goals in the design of DRAMs is to increase the memory capacity of each integrated circuit. To increase the memory capacity, significant efforts have been made at decreasing the size of each of the memory cells that make up the DRAM. One of the most challenging problems faced by DRAM designers is the maintenance of sufficient charge-storage capacity in the capacitors of the memory cells as their size is decreased.
Important parameters involved in increasing the charge stored on the capacitor are typically the dielectric constant, thickness of the insulator, and surface area of the capacitor. Many techniques have been investigated for increasing the charge-storage capacity in capacitors without increasing the area (footprint) the DRAM cells occupy on a chip's surface or the size (volume) of the DRAM cell. One example is a trench capacitor in which the capacitor is formed as part of a trench formed in a substrate with the transistor disposed on the surface of the substrate. A trench capacitor may include a plate electrode of the capacitor inside the trench and a storage electrode on the substrate.
Another approach that allows a memory cell to shrink in size without a loss of its storage capacity is stacking the storage capacitor on top of the associated transistor. DRAM cells made through this process are sometimes called stacked capacitor DRAMs. Although stack capacitor DRAMs may reduce the planar surface area required by a capacitor, they are generally formed significantly above the surface of the substrate in which the DRAM cell is formed, which leads to topological problems in the formation of subsequent layers of the associated integrated circuit.